1. DSpace at Nirma University
  2. 02. Institute of Technology
  3. Electronics and Communication Engineering Department

Dissertation, EC (VLSI) : [423] Collection home page

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Collection's Items (Sorted by Submit Date in Descending order): 261 to 280 of 423
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PreviewIssue DateTitleAuthor(s)
11MECV19.pdf.jpg1-Jun-2013Modeling of HDMI (High De nition Multimedia Interface) Compliance Test SpecificationPatel, Manan
11MECV18.pdf.jpg1-Jun-2013Configuration Register ValidationUdani, Kausshalee A.
11MECV16.pdf.jpg1-Jun-2013Design and Simulation of Third Generation Current Conveyor and Its ApplicationShah, Payal D.
11MECV15.pdf.jpg1-Jun-2013Design and Simulation of Current Mirror CircuitsSaiyed, FaizAhmed J.
11MECV14.pdf.jpg1-Jun-2013Development of Verification IP for LINFlex Controller using UVMPatel, Vivek Jayeshbhai
11MECV13.pdf.jpg1-Jun-2013Implementation of DFT in Automotive ChipPatel, Mehul
11MECV12.pdf.jpg1-Jun-2013Formal Equivalence Verification of Phase Locked LoopsPatel, Jigar Babulal
11MECV11.pdf.jpg1-Jun-2013Improvements to Intel's Analog IP Design Flows at Sub 32nm or below Process NodesPatel, Jaydeep
11MECV10.pdf.jpg1-Jun-2013Quality Checks And Validation Of Memory IpsPatel, Himanshu
11MECV09.pdf.jpg1-Jun-2013Design of Parallel Architecture For Correlator using FPGAPatel, Dhaval D.
11MECV08.pdf.jpg1-Jun-2013Design and Simulation of 2.4 GHz Frequency SynthesizerPatel, Dharmesh Babubhai
11MECV07.pdf.jpg1-Jun-2013Cryptography Algorithm On Reconfigurable HardwareMansur, Riyaz L.
11MECV06.pdf.jpg1-Jun-2013Development of Veri cation Environment for PMB (Process monitoring Box) in nm TechnologyKansagra, Keyurkumar K.
11MECV04.pdf.jpg1-Jun-2013Mixed Signal Validation of Multi Gigabit Serial InterconnectDholia, Jash
11MECV03.pdf.jpg1-Jun-2013Development of DFT for TMC IP in SoCChotaliya, Miten Kaushikbhai
11MECV01.pdf.jpg1-Jun-2013Design and Development of Memory Scrambling Checker and Improvement in Memory Characterization Flow for Advanced Technology NodesAdesara, Ankit M.
10MECV28.pdf.jpg1-Jun-2013Design and Simulation of High Speed CMOS OperationalPatel, Snehal Mahendrabhai
10MECV29.pdf.jpg1-Jun-2012Development of Reliability Aware Intelligent Memory Manager in an SoC (SoC-RAIMM)Khanusiya, Soyeb A.
10MECV27.pdf.jpg1-Jun-2012Characterization,Design & simulation of Digital to Analog Converter in Deep-Submicron TechnologySoni, Rajanikant M.
10MECV26.pdf.jpg1-Jun-2012Optimization In Timing Analysis Corners In 28nmPatel, Chitrarth
Collection's Items (Sorted by Submit Date in Descending order): 261 to 280 of 423
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