1. DSpace at Nirma University
  2. 02. Institute of Technology
  3. Electronics and Communication Engineering Department

Dissertation, EC (VLSI) : [423] Collection home page

Browse
Subscribe to this collection to receive daily e-mail notification of new additions RSS Feed RSS Feed RSS Feed
Collection's Items (Sorted by Submit Date in Descending order): 241 to 260 of 423
< previous   next >
PreviewIssue DateTitleAuthor(s)
12MECV16.pdf.jpg1-Jun-2014Study and Analysis of SRAM Memory Compiler and CharacterizationMakwana, Rohan
12MECV17.pdf.jpg1-Jun-2014RTL to GDS-II Implementation of VLSI Design in `nm' TechnologyModi, Nishant N.
12MECV18.pdf.jpg1-Jun-2014Study And Analysis Of Failure Modes In SRAM Memory and Architecture For Self CorrectionKalura, Monika
12MECV19.pdf.jpg1-Jun-2014Headed Gateway System Integration & Full ValidationPanchal, Jaimin N.
12MECV20.pdf.jpg1-Jun-2014PMB (Process Monitoring Box) Sensor Development And VerificationTripathi, Alok kumar
12MECV21.pdf.jpg1-Jun-2014Improvement to Intel's analog Design Verification Flow for 22nm and below DesignPatel, Vivek M.
12MECV22.pdf.jpg1-Jun-2014Effiecent Fe Methodology For Rtl Integration In Large CPU DesignPrajapati, Pinkeshkumar H.
12MECV23.pdf.jpg1-Jun-2014Memory Design and Performance Evaluation of Memory CompilerRanderia, Mayurkumar
12MECV24.pdf.jpg1-Jun-2014Design Checks in Front-End Environment [Analysis, Development & Automation]Shah, Rahul A.
12MECV25.pdf.jpg1-Jun-2014DFT Simulation and DebugTalati, Deepen
12MECV26.pdf.jpg1-Jun-2014Reduction of Power in High Speed Control Logic using Automated Design ToolsVerma, Mohit
12MECV27.pdf.jpg1-Jun-2014Electrical Characterization Of Storage Interfaces In ATOM Based SOCsVyas, Udit P.
12MECV29.pdf.jpg1-Jun-2014Study of Electro Migration in Full Custom ASIC Design and Develop Assessment MethodologyVaderiya, Yagensh D.
12MECV30.pdf.jpg1-Jun-2014Design & Analysis of SRAM Memory Compiler & its CharacterisationSelani, Yusuf
12MECV31.pdf.jpg1-Jun-2014RTL To GDSII Implementation of Low Power DesignUpadhyay, Harshil N.
12MECV32.pdf.jpg1-Jun-2014Enablement of Optimal and Fast Timing Convergence for High speed I/O DesignsSaifee, Shabbir S.
12MECV33.pdf.jpg1-Jun-2014Standard Cell Characterization And PackagingArdeshana, Gauravkumar P.
12MECV34.pdf.jpg1-Jun-2014Automation of IP Qualification Test Vehicle Verification EnvironmentDoshi, Hardik J.
12MECV36.pdf.jpg1-Jun-2014Formal Equivalence Verification For Vlsi DesignModi, Navni
11MECV20.pdf.jpg1-Jun-2013Parametrization of SRAM sub-systemShah, Rahul K.
Collection's Items (Sorted by Submit Date in Descending order): 241 to 260 of 423
< previous   next >

Discover